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Designing a chip, and testing it?

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Hi, rather new to COMSOL (~6 months) here,

I was wondering (my boss too) if it was possible to test chips in COMSOL?

We have just designed a 6-terminal contact capacitor chip, which would act as a "electron potential barrier" device of sorts, we are still figuring out what is going on. However the current contour potentials doesnt seem to be correct.

In short, how do I connect the various terminals to each other (example the side to the bottom), and implement a resistive (~100ohm) connection between them?

Thanks!


1 Reply Last Post 12 mars 2021, 07:57 UTC−5

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Posted: 4 years ago 12 mars 2021, 07:57 UTC−5

I'm kind on the same position. I'm more of a noobie than you, just a few weeks into the program but my job is mainly focused on PCB designs. You can model the capacitors through Lumped Elements (Magnetic/Electric Fields) or through de Electrical Circuit interface, and then coupling it through External IvsU/Terminal nodes to another interface. (Keep in mind I'm new to the program). I gave you this info because I can tell you that's the way to go, but I can't help you w the problems those interfases give. Mainly, because I'm fighting with them rn^^ Hope it helped! Best regards, Pedro Martín

I'm kind on the same position. I'm more of a noobie than you, just a few weeks into the program but my job is mainly focused on PCB designs. You can model the capacitors through Lumped Elements (Magnetic/Electric Fields) or through de Electrical Circuit interface, and then coupling it through External IvsU/Terminal nodes to another interface. (Keep in mind I'm new to the program). I gave you this info because I can tell you that's the way to go, but I can't help you w the problems those interfases give. Mainly, because I'm fighting with them rn^^ Hope it helped! Best regards, Pedro Martín

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